Adarsh Rajesh

What I've Done

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  AI Engineering Intern · Alpha AI Engineering · Jun–Aug 2026 LLM architecture research & tutoring fine-tunes

  • LLM architecture research: Extended a group LLM research codebase from single-fact recall to multi-step retrieval over Wikidata5M, adding an exact-match KV store with a requery-on-miss and abstention state machine; the retrieval path resolved 500/500 lookups on entities held out of training.
  • Ran matched dense and store-augmented arms at 160M and 360M scale, training to 7.2B tokens on 8× A100 with torchrun DDP, with generalization held out along entity, phrasing, and chain-structure axes.
  • Tutoring LLM (Qwen3-4B + QLoRA): Fine-tuned Qwen3-4B with rank-16 QLoRA on 600 multi-turn tutoring conversations, building pipelines for synthetic data generation, source-provenance auditing, safety filtering, training, and reproducible evaluation.
  • Increased mean evaluation score from 6.26 to 9.34, strict-turn pass rate from 18% to 64%, and critical-requirement compliance from 62% to 96% on a held-out 50-turn benchmark.
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  Student Research Member, Agentic AI · UT Austin · Sep 2025 – Jan 2026 Agentic AI architectures & safety

  Presented on autonomy boundaries, failure modes, and security risks like prompt injection and tool misuse; analyzed scalability challenges in multi-agent coordination and proposed guardrails via validation, constraints, and human-in-the-loop oversight.

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  Research Member, Commodity Forecasting · Texas Global Macro Team · Aug 2025 – Present Deep-learning commodity price forecasting

  Deployed N-HiTS and N-BEATS models in Python to forecast global commodity prices, and led a quantitative study of the orthodox tea market — integrating trade, weather, and economic indicators to model price volatility.

Projects

• SystemVerilog · Computer Architecture · RTL Design Out-of-Order CPU

  A 64-bit processor for a custom instruction set, with register renaming, a 16-entry reorder buffer, reservation stations, and a load-store queue that forwards stores to loads. Two instructions issue per cycle and execute out of order while still committing in program order.

• TypeScript · Cloudflare Workers AI · Durable Objects Screenshot Steps Helper

  A Cloudflare Workers app that turns screenshots and a user goal into click-by-click UI navigation steps, using Durable Objects for session memory so context persists across follow-up questions.

• C · Compilers · Custom ISA Tinker Assembler + Simulator

  An end-to-end C toolchain that assembles programs for a custom 64-bit ISA into a binary object format with separate code and data segments, then executes them on a simulator. Ships three demo programs written by hand in the assembly language, including a matrix multiply.

• C · Computer Architecture · Memory Hierarchy Two-Level Cache Simulator

  Models a split instruction and data L1 sitting over an inclusive L2, with write-back write-allocate and back-invalidation on eviction. Comparing LRU against random replacement surfaced a cyclic access pattern where random eviction halves the miss count.

• Python · scikit-learn · TF-IDF Product Catalog Entity Resolution

  Works out which Amazon and Google listings refer to the same product, scoring name pairs with TF-IDF character n-grams and fuzzy token matching. Thresholds are tuned on a validation split and reported on held-out test data.